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High Cost Performance
Utilizing the latest system design and stateof-the-art device technology, the cost of the TS600 system has been greatly reduced without compromising its underlying functions and performance, or its ability to meet the changing testing needs of the future.
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512 Pins, Full-fledged Per-pin
Capability
Timing edges, DC voltage levels/
measurement, and other settings can be
made for each pin. This feature removes
needless restrictions on the test condition
settings, and thus radically reduces the test time. In addition, parallel testing, which is very effective for reducing the cost of testing, is easily accommodated by this architecture. |
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High-speed Pin Electronics
Solution (Optional)
Test speed is dramatically improved by the new pin electronics solution which speeds up on-board control processors. |
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SCAN, ALPG Options
These options are ideal for large-scale
system-on-a-chip devices, such as those
having more than 10M gates or largecapacity embedded DRAM. |
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Analog Options
Incorporating the TS1000’s field-proven
analog options, the TS600 can be used for advanced mixed-signal tests. |
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Test Components
The TS600 can efficiently and economically test a device-specific test component when it is installed on the tester load board. |
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Powerful Conversion Tools for
Reviving Your Existing Resources
The extensive vector pattern instruction set of the TS600 contains most of the pattern instructions of conventional test systems. Thus, any vector pattern program can be easily converted for use with the TS600. Various conversion tools are also available for converting to and from other test program formats, so the TS600 can be easily used in tandem with other test systems. |
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| Target devices: |
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MCU with ADC/DAC,
System-on-a-Chip,
Large-scale ASIC,
ASSP such as DVD,
Memory Cards, Real-time Clock,
Controllers/Drivers |
| Overall timing accuracy(OTA): |
±800ps |
| Parallel measurement: |
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8DUTs (32 DUTs: OS MULTI) |
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