SB2000 IEEE1394 Serial Bus Analyzer

NAGATA Kazuo¹ KURIYAMA Kazuya¹ ARASAWA Hisaki¹ AKIYAMA Koji¹

The SB2000 IEEE1394 serial bus analyzer uses hardware triggering and real-time filtering functions. This instrument efficiently analyzes the performance of equipment using the IEEE1394 protocol. The analyzer also can generate isochronous packets and asynchronous packets sequentially. Internal probing circuits measure the serial bus signals, twisted pair A (TPA) and twisted pair B (TPB). This enables users to analyze configurations and arbitrations by linking the event list with a digital oscilloscope. SB2000 can thus analyze the IEEE1394 serial bus fully from the physical layer to the application layer.

1. Test and Measurement Business Division

INTRODUCTION

Figure 1 External view of the IEEB1394 serial bus analyzer SB2000

An excellent serial bus protocol, the IEEE1394 facilitates electronic networks for handling images, music and data in offices, studios and households. The bus offers a transmission rate of 100Mbps or faster. It also has many easy-to-use features. For example, it has a hot-plug function. This permits users to plug in and unplug peripherals without turning off the power. The protocol also has a plug-and-play function, which makes set up simple by automatically establishing communication protocols.

Equipment using the IEEE1394 serial bus must be able to process complex communication protocols. Such equipment must also support connections to a wide range of other devices from many manufacturers. The equipment must operate without trouble no matter what combination of units link to it.

In designing chips and equipment compatible with the IEEE1394 serial bus, manufacturers must fully check compatibility with communications protocols and design products so they do not interfere with communications. At the same time, manufacturers must make certain different pieces of equipment are compatible.

Most products incorporating the IEEE1394 serial bus consist of hardware, firmware for processing communications protocols, and software for transmitting data and processing control commands. Each performance of these components must be optimized. They also must be free of bugs.

Figure 2 Connection pane of the SB2000

To verify each section's performance, manufactures must perform thorough analyses of serial bus signals and packet data. The analyses must verify performance under a variety of conditions. For example, the analyses must show what kinds of nodes are connected and in what way. Analyses must also show whether the system correctly performs the variables that determine the packet intervals and bus initialization. Furthermore, the analyses must determine whether the system properly conducts arbitration between nodes to obtain the bus.

Manufacturers need analyses for still more information. Analyses must show which packets transmit from which node to which node, and in what procedure; detect the appearance of packets incompatible with protocols, cyclic redundancy check (CRC) errors or retransmissions; and determine whether the system handles these properly.

Thus, a data analyzer must meet many requirements. Besides offering many analysis functions, the data analyzer must reliably incorporate data on the IEEE1394 serial bus and display this information in a way that is easy to understand.

IEEE1394 SERIAL BUS ANALYZER

The SB2000 performs all the functions users need in a data analyzer. The first in this series was the 1394 Data Analyzer, one of the first IEEE1394 protocol analyzers on the market. It became commercially available in the spring of 1997. That's when 3A International, Inc. of the United States, a business partner of Yokogawa, initiated sales of the product. Analyzers in this series have become the de facto industry standard.

In addition to offering functions of other analyzers in the series, the SB2000 (Figure 1) also has a waveform measurement function and an improved capture and generator function (Table 1).

Table 1 Main specifications of the SB2000

Protocol supported:	IEEE1394-1995
1394 transmission rate:	100 M / 200 Mbps
No. of 1394 ports:	4 ports (2 ports/node)
Management function:	Cycle master, isochronous resource manager and function capability setting
Analyzer functions
Topology analysis:	Topology connection, Max Speed, node function display
Event analysis:	Packet analysis, error analysis, statistical / time analysis
Capture memory:	2 MB (option 16 MB)
Time stamp resolution:	40.7 ns / 125 µs, selectable
Trigger function:	3 state sequence trigger
Packet trigger condition:	Packet, pattern (4 quadlet in sequence)
Other trigger conditions:	Bus reset, CRC error, arbitration reset gap, external trigger
Filter function:	Packet matching and packet size
Filtering condition:	Packet pattern (4 quadlet in sequence), packet size
Generator functions
CSR access:	CSR register read/write/lock
Traffic generator:	Asynchronous packet, isochronous packet, PHY packet, error packet
Traffic memory:	2 MB (option 16 MB)
Response test function Propagation delay measurement function Waveform measurement function
Output signals:	Differential and common node signals of TPA and TPB

While able to provide a comprehensive array of analyses, the SB2000 is nevertheless compact enough for users to carry it around easily. It has four IEEE1394 interface ports on its left side. Users can start measurement immediately simply by connecting the analyzer with their devices or systems. Also, by connecting the analyzer to an external digital oscilloscope, users can easily monitor the waveforms of target packets (Figure 2).

The bus analyzer has two nodes. Each node has two ports. The main roles of the analyzer node are to capture and analyze packets. Meanwhile, the generator node generates packets and conducts analyses of packet topology.

Figure 3 IEEE1394 bus and differential and common mode signals of TPA and TPB (Self ID packet after bus reset).

Figure 4 Block diagram of the SB2000

The analyzer node has hardware trigger and filter circuits and on-board capture memory. This accommodates 100 percent capturing and provides precise time stamping. The analyzer node also has a buffer circuit for waveform outputs (Figure 3). The generator node incorporates a traffic memory that enables isochronous packet transmission at high traffic intensity (Figure 4).

Topology Analysis

The topology viewer displays all the devices or nodes connected to the analyzer in blocks, indicating their node identifications, unique identifications, speeds and functions on the bus, such as bus manager and isochronous resource manager. The viewer also displays icons and names of devices that are rewritable (Figure 5). Lines connecting the blocks indicate IEEE1394 bus connections and their swiftest possible transmission rates. The topology window enables users at a glance to check the connection of devices and to determine their characteristics in real time.

Figure 5 Topology window and node detail window

Furthermore, by left-clicking on a block, the user can obtain detailed information about the node, such as its power class, whether the link layer is on or off and the manager capacity. When users right-click on a block, the analyzer transmits asynchronous packets to the corresponding node. This will debug it by reading, writing and locking the control and status register (CSR).

Packet Analysis

The lower part of the event viewer's window shows the user a list of captured events and packets. The upper part of the window shows the topology at the point of capture (Figure 6). As the cursor position on the event list changes, the topology changes. This function proves effective for packet analysis while checking the topology, which changes upon every bus reset.

The event list displays each captured packet in a line. Bus resets and arbitration reset gaps also are displayable as events. The resolution of time stamps is 40.7ns/125 µs (maximum measurement time length: 128 seconds / for six days). The resolution is switchable depending on whether users want a fine- resolution measurement or an extended time measurement. By double clicking on a packet on the event list, users can view detailed information about the packet, including all payload data.

Figure 6 Event window and filter window (e.g.: ISO packet and CS packet)

The SB2000 has a window for setting trigger conditions (Figure 7). Users can set trigger conditions for four quadlets from the beginning of a packet to arbitrary offset. Condition settings can use AND, OR, NOT or THRU functions. In setting triggering conditions, users can identify source node IDs and destination node IDs. They can also use other headers or payload data. Additionally, by activating the arming trigger function, users can set trigger conditions that combine up to three states. Thus, users can set the trigger to operate only when specific conditions occur simultaneously. Bus resets, CRC errors, arbitration reset gaps and external signals also serve as trigger conditions.

Another feature of the SB2000 is a window for setting filtering functions (Figure 6, inset). This filtering function works for example, in analyzing asynchronous transmissions. The function permits swift analysis of the targeted packet communication by filtering cycle start packets and isochronous packets as well as the asynchronous packets of other nodes.

Figure 7 Trigger window

The filtering function also provides a slicing function for determining packet length. This function enhances the effectiveness of the 16MB capture memory. In addition to facilitating the capture of packets, the filtering function also controls the equipment's display of packets.

Statistical and Time Analysis

By selecting several packets on the event display window and selecting the band analysis function, users can view useful text and graphics in the statistical analysis window (Figure 8). The window can show, for example, the distribution of the occupied bands, the occupied band for each channel or node, or fluctuations in packet arrival times.

The time analysis function helps in applying the response test and in measuring propagation delays. The response test sends two asynchronous request packets in sequence using different transmission intervals to check the response performance. To measure propagation delay, the system sends several isochronous packets with time stamps from the generator node through the target device to the analyzer node, which measures the distribution of propagation time.

Waveform Measurement

Figure 8 Statistical analysis window

Furthermore, the SB2000's waveform measuring function lets users measure the waveform of a single port of the analyzer node on the IEEE1394 bus. This function creates high- impedance, low-capacity buffer circuits for the twisted-pair signals, TPA and TPB, and calculates the output differential and common signals of these two kinds of twisted pair signals. By connecting these signals and external trigger output to a digital oscilloscope, users can obtain measurements of packet waveforms designated by trigger settings.

When SB2000 users employ a DL2700 Series digital oscilloscope through the GP-IB control, the SB2000 can designate a packet on the event list for display in the center of the oscilloscope monitor. This function enables more than the analyses of bus resets, configurations, and each packet's arbitration and speed signals. It also allows users to take measurements of gap time and the analysis of errors such as CRC errors.

Figure 9 Packet builder and sequence builder

Additionally, this function enables the analysis of various abnormal bus resets including multiple bus resets, and abnormal bus behavior. Conventional data analyzers that engineers have designed solely for the analysis of packet data normally do not provide such analyses. Furthermore, using external trigger input and output, the SB2000 serial bus analyzer readily allows users to conduct analyses involving different combinations of user equipment or logic analyzers.

Packet Generator Function

In addition to generating asynchronous packets, isochronous packets and physical layer packets, the SB2000 serial bus analyzer can generate packets containing errors. For this purpose, the packet builder creates packets. Then the sequence builder sets the transmission order of the packets and starts transmitting them (Figure 9) either with or without performing validation of the isochronous resources.

Because this function permits the sequential transmission of packets, users can press a single button to perform one set of equipment controls. Also, when users select packet capturing during such packet generation, they can easily check the operation of the target equipment.

CONCLUSION

We has developed new analyzers to accommodate ultra-fast 400 Mbps processing and the analyses of upper protocols such as the AV protocol, SBP-2 and the Internet Protocol (IP) over 1394. Upcoming analyzers also will accommodate new standards including the IEEE1394/b (high-speed, optical) and the IEEE1394.1 (bridge).

REFERENCES

1. Nagata K.,et al.,"SB2000 Analyzer Provides Ample Functions for Probing IEEE1394 Bus", ASIA ELECTRONICS INDUSTRY, vol. 4, no. 7, p. 46-48, p. 87, 1999
2. Nagata K., et al.,"IEEE1394 Serial Bus Analyzer", Denshi Gijutsu, vol. 41, no. 3, p. 8-13, 1999 in Japanese